Kernel Metadata Declaration — on demand
ISO 26324 asks a DOI Registration Agency to produce a Kernel Metadata Declaration for every DOI it issues. Give any DOI: its public record becomes a record in the Smart Scholars DOI Metadata Format 1.0, checked against every rule, and declared as the Kernel XML.
✓ Meets every rule of the format
The record below is complete and every controlled value is a DOI Attribute Value Set 2.3 spelling. The Declaration on the right follows DOIMetadataKernel.xsd element by element.
What the DOI identifies
REVIEW ON A DECODER FOR SHORT BCH CODES FOR EMERGING MEMORIES
10.46243/jst.2023.v8.i03.pp25-31 · JournalArticle — an article in a journal · Digital · Visual · Language · en
Published 2023-03-10
Part of Journal of Science & Technology · ISSN 2456-5660 · vol. 8 · no. 3 · pp. 25–31
Principal agents
- D. SUMALATHA D. SUMALATHA (author → Author)
- Longman Publishers (publisher → Publisher)
Also in the record, outside the Kernel: the abstract, the licence, 4 links, 15 references. Source: Crossref (member 25296), registered 2024-02-16, last deposited 2026-09-20.
System metadata — ISO 26324:2025, Annex B · DOI Handbook 10.1
Each element by the standard's name and the Handbook's (in grey), read off the record.
| DOI Name DOI name | 10.46243/jst.2023.v8.i03.pp25-31 |
| Referent Type referentType | Creation |
| Referent Sub-Type referentSubType | JournalArticle — an article in a journal |
| Referent Name(s) referentName(s) | REVIEW ON A DECODER FOR SHORT BCH CODES FOR EMERGING MEMORIES (PrincipalTitle, en) |
| Basic Metadata basicMetadata | author: D. SUMALATHA D. SUMALATHA publisher: Longman Publishers published: 2023-03-10 part of: Journal of Science & Technology · ISSN 2456-5660 · vol. 8 · no. 3 · pp. 25–31 language: en form: Digital · Visual · Language |
| Referent Identifier(s) alternateIdentifier(s) | none besides the DOI |
| Registration Authority registrationAuthorityCode | Crossref — issued by Crossref (member 25296); held here as a copy |
| Created Date issueDate | 2024-02-16 |
| relatedIdentifiers | none needed — the descriptive metadata is in this record |
The record
{
"format": "smartscholars-doi-metadata/1.0",
"doi": "10.46243/jst.2023.v8.i03.pp25-31",
"referent": "Creation",
"type": "JournalArticle",
"structural_type": "Digital",
"modes": [
"Visual"
],
"characters": [
"Language"
],
"titles": [
{
"value": "REVIEW ON A DECODER FOR SHORT BCH CODES FOR EMERGING MEMORIES",
"type": "PrincipalTitle",
"lang": "en"
}
],
"identifiers": [
{
"type": "DOI",
"value": "10.46243/jst.2023.v8.i03.pp25-31"
}
],
"agents": [
{
"role": "author",
"name": {
"given": "D. SUMALATHA",
"family": "D. SUMALATHA"
},
"sequence": "first"
},
{
"role": "publisher",
"name": {
"org": "Longman Publishers"
}
}
],
"dates": {
"published": "2023-03-10",
"date_type": "PublicationDate",
"online": "2023-03-10"
},
"language": "en",
"container": {
"type": "Journal",
"titles": [
{
"value": "Journal of Science & Technology",
"type": "PrincipalTitle"
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"identifiers": [
{
"type": "ISSN",
"value": "2456-5660",
"medium": "electronic"
}
],
"volume": "8",
"issue": "3",
"pages": {
"first": "25",
"last": "31"
}
},
"links": [
{
"url": "https://www.jst.org.in/index.php/pub/article/view/706",
"return_type": "text/html",
"primary": true
},
{
"url": "https://www.jst.org.in/index.php/pub/article/download/706/633",
"purpose": "text-mining",
"return_type": "application/pdf"
},
{
"url": "https://www.jst.org.in/index.php/pub/article/download/706/1886",
"purpose": "text-mining",
"return_type": "application/xml"
},
{
"url": "https://www.jst.org.in/admin/uploads/Review%20on%20A%20Decoder%20for%20Short%20BCH%20Codes%20for%20Emerging.pdf",
"purpose": "similarity-checking"
}
],
"abstract": {
"value": "These emerging memories also struggle with reduced reliability as technology scales down, and as a solution, error-correcting code (ECC) and its encoder / decoder circuits have been applied. While NAND flash requires a powerful ECC that can correct up to 100 errors, As well as simply increasing the memory capacity, ECC can be used to optimize memory performance with regard to density and energy consumption, The ECC has thus become an essential part of developing memories. The Bose – Chaudhuri – Hocquenghem (BCH) software is commonly used for evolving memories to correct two or three errors",
"lang": "en"
},
"license": {
"url": "https://creativecommons.org/licenses/by/4.0/",
"start": "2023-03-10",
"applies_to": "vor"
},
"references": [
{
"key": "ref1",
"doi": "10.1109/jsac.2016.2603698",
"unstructured": "P. Amato, S. Bellini, M. Ferrari, C. Laurent, M. Sforzin, and A. Tomasoni, “Fast decoding ECC for future memories,” IEEE J. Sel. Areas Commun., vol. 34, no. 9, pp. 2486–2497, Sep. 2016"
},
{
"key": "ref2",
"doi": "10.1109/vlsit.2014.6894354",
"unstructured": "S. H. Kang, “Embedded STT-MRAM for energyefficient and costeffective mobile systems,” in IEEE Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2014, pp. 36–37"
},
{
"key": "ref3",
"doi": "10.1109/vlsic.2014.6858403",
"unstructured": "H. Noguchi, K. Ikegami, N. Shimomura, T. Tetsufumi, J. Ito, and S. Fujita, “Highly reliable and low-power nonvolatile cache memory D. SUMALATHA, MOHAMMAD GANDHI BABU, DR. N. SURESH: REVIEW ON A DECODER FOR SHORT BCH CODES FOR EMERGING MEMORIES with advanced perpendicular STT-MRAM for highperformance CPU,” in IEEE Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2014, pp. 1–2"
},
{
"key": "ref4",
"doi": "10.1109/imw.2014.6849370",
"unstructured": "P. Amato, C. Laurent, M. Sforzin, S. Bellini, M. Ferrari, and A. Tomasoni, “Ultra fast, two-bit ECC for emerging memories,” in Proc. 6th IEEE Int. Memory Workshop (IMW), May 2014, pp. 79–"
},
{
"key": "ref5",
"doi": "10.1109/sips.2012.11",
"unstructured": "Y. Emre, C. Yang, K. Sutaria, Y. Cao, and C. Chakrabarti, “Enhancing the reliability of STT-RAM through circuit and system level techniques,” in Proc. IEEE Workshop Signal Process. Syst., Oct. 2012, pp. 125–130"
},
{
"key": "ref6",
"doi": "10.1109/aspdac.2012.6165062",
"unstructured": "D. Niu, Y. Xiao, and Y. Xie, “Low power memristorbased ReRAM design with error correcting code,” in Proc. 17th Asia South Pacific Design Autom. Conf., Jan./Feb. 2012, pp. 79–84"
},
{
"key": "ref7",
"doi": "10.1109/jetcas.2016.2547745",
"unstructured": "M. Mao, Y. Cao, S. Yu, and C. Chakrabarti, “Optimizing latency, energy, and reliability of 1T1R ReRAM through cross-layer techniques,” IEEE J. Emerg. Sel. Topics Circuits Syst., vol. 6, no. 3, pp. 352–363, Sep. 2016"
},
{
"key": "ref8",
"doi": "10.1109/tmscs.2016.2536026",
"unstructured": "C. Yang, M. Mao, Y. Cao, and C. Chakrabarti, “Cost-effective design solutions for enhancing pram reliability and performance,” IEEE Trans. Multi-Scale Comput. Syst., vol. 3, no. 1, pp. 1–11, Jan./Mar. 2017"
},
{
"key": "ref9",
"doi": "10.7873/date2014.195",
"unstructured": "B. Del Bel, J. Kim, C. H. Kim, and S. S. Sapatnekar, “Improving STT-MRAM density through multibit error correction,” in Proc. IEEE/ACM Conf. Design, Autom. Test Eur. (DATE), Mar. 2014, pp. 1–6"
},
{
"key": "ref10",
"doi": "10.7873/date.2015.0145",
"unstructured": "Z. Pajouhi, X. Fong, and K. Roy, “Device/circuit/ architecture co-design of reliable STT-MRAM,” in Proc. IEEE/ACM Conf. Design, Autom. Test Eur. (DATE), Mar. 2015, pp. 1437–1442"
},
{
"key": "ref11",
"doi": "10.1109/isvlsi.2016.118",
"unstructured": "Y. Alkabani, Z. Koopmans, H. Xu, A. K. Jones, and R. Melhem, “Write pulse scaling for energy efficient STT-MRAM,” in Proc. IEEE Comput. Soc. Annu. Symp. VLSI (ISVLSI), Jul. 2016, pp. 248–253"
},
{
"key": "ref12",
"doi": "10.3850/9783981537079_0419",
"unstructured": "X. Wang, M. Mao, E. Eken, W. Wen, H. Li, and Y. Chen, “Sliding basket: An adaptive ECC scheme for runtime write failure suppression of STT-RAM cache,” in Proc. IEEE/ACM Conf. Design, Autom. Test Eur. (DATE), Mar. 2016, pp. 762–767"
},
{
"key": "ref13",
"doi": "10.1109/cicc.2009.5280877",
"unstructured": "X. Wang, D. Wu, C. Hu, L. Pan, and R. Zhou, “Embedded high-speed BCH decoder for newgeneration NOR flash memories,” in Proc. IEEE Custom Integr. Circuits Conf. (CICC), Sep. 2009, pp. 195–198"
},
{
"key": "ref14",
"doi": "10.1109/tcsii.2009.2029144",
"unstructured": "W. Xueqiang, P. Liyang, W. Dong, H. Chaohong, and Z. Runde, “A high-speed two-cell BCH decoder for error correcting in MLC nor flash memories,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 56, no. 11, pp. 865–869, Nov. 2009"
},
{
"key": "ref15",
"doi": "10.1109/sips.2014.6986060",
"unstructured": "Y. Yoo and I.-C. Park, “A search-less DEC BCH decoder for lowcomplexity fault-tolerant systems,” in Pro"
}
],
"record": {
"registrant": "Longman Publishers",
"registered": "2024-02-16",
"updated": "2026-09-20",
"issue_number": 1,
"source": "crossref-api",
"source_agency": "Crossref (member 25296)"
}
}The Kernel Metadata Declaration
DOIMetadataKernel.xsd · namespace http://www.doi.org/2010/DOISchema · Attribute Value Sets 2.3 · draft — the agency's DOI name is filled in on accreditation
<?xml version="1.0" encoding="UTF-8"?>
<!-- DRAFT declaration: Smart Scholars is not yet a DOI Registration Agency. registrationAgencyDoiName is a marker (10.0/ is no RA's prefix) and is filled in on accreditation. -->
<kernelMetadata xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.doi.org/2010/DOISchema https://www.doi.org/doi_schemas/DOIMetadataKernel.xsd" xmlns="http://www.doi.org/2010/DOISchema">
<referentDoiName>10.46243/jst.2023.v8.i03.pp25-31</referentDoiName>
<primaryReferentType>Creation</primaryReferentType>
<registrationAgencyDoiName>10.0/smart-scholars-draft</registrationAgencyDoiName>
<issueDate>2026-10-04</issueDate>
<issueNumber>1</issueNumber>
<referentCreation>
<name primaryLanguage="en">
<value>REVIEW ON A DECODER FOR SHORT BCH CODES FOR EMERGING MEMORIES</value>
<type>PrincipalTitle</type>
</name>
<identifier>
<nonUriValue>10.46243/jst.2023.v8.i03.pp25-31</nonUriValue>
<uri returnType="text/html" doesContentNegotiation="true">https://doi.org/10.46243/jst.2023.v8.i03.pp25-31</uri>
<type>DOI</type>
</identifier>
<identifier>
<uri returnType="text/html">https://www.jst.org.in/index.php/pub/article/view/706</uri>
<type>URI</type>
</identifier>
<identifier>
<uri>https://www.jst.org.in/index.php/pub/article/download/706/633</uri>
<type>URI</type>
</identifier>
<identifier>
<uri returnType="application/xml">https://www.jst.org.in/index.php/pub/article/download/706/1886</uri>
<type>URI</type>
</identifier>
<identifier>
<uri>https://www.jst.org.in/admin/uploads/Review%20on%20A%20Decoder%20for%20Short%20BCH%20Codes%20for%20Emerging.pdf</uri>
<type>URI</type>
</identifier>
<structuralType>Digital</structuralType>
<mode>Visual</mode>
<character>Language</character>
<type>JournalArticle</type>
<principalAgent>
<name>
<value>D. SUMALATHA D. SUMALATHA</value>
<type>PrincipalName</type>
</name>
<role>Author</role>
</principalAgent>
<principalAgent>
<name>
<value>Longman Publishers</value>
<type>PrincipalName</type>
</name>
<role>Publisher</role>
</principalAgent>
<linkedCreation>
<name>
<value>Journal of Science & Technology</value>
<type>PrincipalTitle</type>
</name>
<identifier>
<nonUriValue>2456-5660</nonUriValue>
<type>ISSN</type>
</identifier>
<referentCreationRole>Part</referentCreationRole>
<referentCreationSequenceIdentifier>
<value>8</value>
<type>VolumeNumber</type>
</referentCreationSequenceIdentifier>
<referentCreationSequenceIdentifier>
<value>3</value>
<type>IssueNumber</type>
</referentCreationSequenceIdentifier>
<referentCreationSequenceIdentifier>
<value>25-31</value>
<type>PageNumber</type>
</referentCreationSequenceIdentifier>
</linkedCreation>
<language>en</language>
<languageOfReferentContent>
<language>en</language>
<languageOfReferentContentType>Original</languageOfReferentContentType>
</languageOfReferentContent>
<creationDate>
<date>2023-03-10</date>
<creationDateType>PublicationDate</creationDateType>
</creationDate>
</referentCreation>
</kernelMetadata>
